1. Field of the Invention
The present invention relates to a semiconductor package, and in particular to a ball grid array semiconductor package and a fabrication method thereof.
2. Background of the Related Art
A quad flat package (QFP) is a widely used multipin semiconductor package. However, as a semiconductor package is required to have more pins, a QFP has problems because a lead is easily bent when a width of an outlead becomes narrower and a pitch between leads becomes finer. Further, it is difficult to array a printed circuit board (PCB) and the QFP package while controlling quantity of solder when mounting the package on the PCB. Accordingly, ball grid array (BGA) semiconductor packages, which contain multiple pins and solve the above problems, are being used. The BGA semiconductor package has no outlead because solder balls serve as the outlead, which solves the defects of the QFP.
FIG. 1 is a diagram showing a vertical cross-section of a related art BGA semiconductor package. As shown therein, the related art BGA semiconductor package includes a substrate 1 in which a plurality of patterned conductive lines (not shown) are installed, a semiconductor chip 2 attached on an upper surface of the substrate 1 by an adhesive 3, a plurality of conductive wires 4 electrically connecting the semiconductor chip 2 and one end of each of the patterned conductive lines installed in the substrate 1, a molding part 5 and a plurality of solder balls 6. The molding part 5 formed on the upper surface of the substrate 1 seals the semiconductor chip 2 and the conductive wires 4. The plurality of solder balls 6 are fixed to a lower surface of the substrate 1 in order to be connected with the other ends of the patterned conductive lines installed in the substrate 1. Each of the patterned conductive lines becomes an electric channel for connecting the upper and lower parts of the substrate.
However, since the related BGA semiconductor package shown in FIG. 1 has the solder balls, which become input and output terminals of an electric signal, only on the lower surface thereof, it is difficult or impossible to manufacture a package module with multiple layers of semiconductor packages. Accordingly, it is difficult to expand functional capacities and capabilities in a limited area by layering plural semiconductor packages.